GE Fanuc PLC Sweep Details

This article describes the major portions of the PLC Sweep:
a. Housekeeping
b. Input Scan
c. Application Program Logic Scan

a. Housekeeping
The portion of housekeeping of the sweep executes all of the jobs required to prepare for the sweep start. If the PLC is in mode of CONSTANT SWEEP, the sweep is interrupted until the necessary sweep time passes. The contact of OV_SWP %SA0002 is set, and the sweep carries on with no delay if the necessary time has already elapsed. Then, timer values are revised by computing the difference from the previous sweep start and the new sweep time.

The real start of sweep is documented in 100 microsecs increases in order to maintain accuracy. Every timer has a reminder field which includes the 100 microsec increments number of that have happened since the last time the value of timer was increased.

b. Input Scan
Inputs scanning happen during the sweep input scan portion, just before the logic solution. All input modules of Series 90-30 are scanned and the data saved in memory of % I as discrete inputs or % AI as analog inputs, as appropriate during this part of the sweep. Any input of global data received by a GCM (Genius Communications Module), a GCM+ (Enhanced Genius Communications Module), or a GBC (Genius Bus Controller) is saved in memory of %G. Modules are scanned in rising indication address order, beginning with any installed Genius Module, then modules of discrete input, and lastly modules of analog input.

c. Application Program Logic Scan or Solution
The scan of application program logic happens directly following the input scan completion. The scan of application program logic executes two major jobs:
(1) Solving or executing the program logic and
(2) Updating output memory of %Q, %AI, and %AQ.
Output modules, though, are not renewed until the output scan happens. Generally, ladder logic is resolved from top to bottom and left to right, even though this flow direction can be adjusted temporarily by subroutine jumps and calls.

The solution of logic finishes when an instruction END is met or when the default END OF PROGRAM LOGIC is achieved. The CPUs of 313 and higher have an ISCP that performs the instructions of Boolean, and a microprocessor of AMD SC 520, 80386 or 80C188 implements the counter, timer, and function blocks. In the CPUs of Model 311 and 90-20, the 80C188 carries out all instructions of Boolean, function block, counter, and timer.

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