Saturday, October 29, 2011

CPU Functions and Security Functions for a PLC

The functions of CPU
The functions of CPU for a PLC comprise the memory, processor, and support circuitry needed to perform the programmed instructions and correspond with a variety of I/O functions. The functions of system monitoring are executed by the power supply voltage monitors of CPU; reset circuits and watchdog timers (WDTs); and monitors of thermal for hot spots and vital devices. The module of CPU also contains components to allow communications to PLCs, PCs, other modules, and the human interface. The hot-swap controllers, isolated power supplies, and backup battery merge for management of power.

The functions of security
The components of security and authentication avoid unauthorized access or system control to system data. The security components complexity diverges depending on the security level required. Characteristic security components contain security managers with interfere detection and memory of non imprinting, microcontrollers security with authentication, and 1-Wire devices of authentication with an incorporated SHA-1 algorithm. Secure components need some particular features, including interfere detection; fast-erasing memory for secret data storage; encryption engines of analysis resistant; and support for FIPS 140.2, PCI PED 2.1, (level 3 and above), EMV 4.1, and universal criteria requirements.

The MAXQ1850 is the smallest industry’s IC with high-security microcontroller. This single-cycle processor of RISC performs 16-bit instructions and utilizes a 32-bit data path for unequaled efficiency of processing and optimization of C code. It has the elasticity to be a controller of stand-alone or a coprocessor based on the secure application’s requirement with asymmetric encryption routines and hardware-accelerated symmetric. System cost is extremely optimized with incorporated active interfere sensors. These sensors notice and respond to attacks by removing the internal, safe 8KB SRAM of battery-backed nonvolatile. The microcontroller only utilizes 130nA to back up the operate the tamper sensors and secure SRAM.

• Develop system security
–– Hardware accelerators of cryptographic for SHA-2, DES, AES, RSA, ECDSA, DSA, 3DES, and SHA-1
–– Supervisor of security offers interfere detection and response
–– Engine execution of cCryptography at 65MHz
• Smallest board space requirement
–– CSBGA package 7mm x 7mm, 49-ball
–– TQFN package 6mm x 6 mm, 40-pin

Encryption keys from intruders for security managers protect
The managers of security offer complete protection of data. The single-chip solution of DS3600 gives interfere detection, encryption key storage, security, and encryption destruction key in the event of interfering.
• Enhanced system security
–– Supports the highest requirements of security-level of the PCI PED, FIPS 140.2, EMV 4.1, and universal Criteria certification agencies
–– Multilevel interfere detection
–– original memory on-chip non-imprinting


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